EV1340QI Datasheet, PDF (14/20 Pages) Enpirion, Inc. – 5A Synchronous Highly Integrated DC-DC DDR2/3/QDRTM Memory Termination and Low VIN Power SoC

Application Information
Soft-Start Capacitor Selection
A soft-start capacitor is recommended on the
EV1340’s VREF pin to ground. The soft-start
capacitor (C_SS) serves as a slew rate limiter for
fast VDDQ input ramps or for turning the
device ON using the ENABLE pin. It is also a
noise filter for noise coming from VDDQ. The
soft-start time constant is determined by the
value of this capacitor and the input divider
resistors R_C and R_D. See Figure 5. Altera
recommends a starting value of 3300pF for the
soft-start capacitor on the VREF node.
Output Voltage Programming and Loop
Compensation
The output voltage of EV1340QI is determined
by the two voltage dividers as shown in the
simplified application diagram below:
EV1340QI
In rare cases, modifications to the
compensation might be required. The EV1340
compensation can be modified for specific
applications. For more information, contact
Power Applications support.
R_A  100 VDDQ (value in k)
C_A

5 10^6
R_A
(C_A /R _A in F/)
Round C_A down to closest
standard value lower than
calculated value.
R₁  3 k
R_B  4  R _A
Figure 6: External Feedback and Compensation Network
Figure 5: Typical Application Schematic
The input voltage divider consisting of R_C and
R_D should be selected to make VREF = 0.4 *
VDDQ for proper POK operation. Altera
recommends R_C = 15kΩ and R_D = 10kΩ. This
resistor ratio is essential for proper operation of
POK. In steady state, VREF = VFB, and VOUT
= 0.5*VDDQ given the recommended values
for R_A  R_D.
Although the EV1340 integrates most of the
compensation network, a phase lead capacitor
and a resistor are required in parallel with the
upper resistor R_A of the external feedback
network. See Figure 6 for all the component
values in the compensation circuit, which has
been optimized for use with 2X100μF, 1206,
X5R or X7R ceramic output capacitors.
Input Capacitor Selection
The EV1340 requires a minimum of 47µF of
input capacitance for VDDQ. Additional
capacitors (C_AVIN and C1) of 10µF is
recommended for AVIN and the resistor divider
network of VREF (R_C, R_D). Low ESR ceramic
capacitors are required with X5R or X7R
dielectric formulation. Y5V or equivalent
dielectric formulations must not be used
because these dielectrics lose capacitance
with frequency, temperature and bias voltage.
In some applications, lower value ceramic
capacitors maybe needed in parallel with the
larger capacitors in order to provide high
frequency decoupling.
The table below shows some typical
recommended input capacitors for the EV1340.
Other capacitors with similar characteristics
may also be used in the input circuit.
Typical Recommended Input Capacitors
Description
47µF, 10V,
X5R, 1206
47µF, 4V,
X5R, 0805
MFG
Taiyo
Yuden
Murata
P/N
LMK316BJ476ML-T
GRM21BR60G476M
06218
14
March 24, 2015
www.altera.com/enpirion
Rev C