EPM3032ATC44-10N Datasheet, PDF (12/46 Pages) Altera Corporation – Programmable Logic Device Family

MAX 3000A Programmable Logic Device Family Data Sheet
Figure 6. I/O Control Block of MAX 3000A Devices
6 or 10 Global
Output Enable Signals (1)
PIA
OE Select Multiplexer
VCC
to Other I/O Pins
from
Macrocell
GND
Open-Drain Output
Slew-Rate Control
to PIA
Note:
(1) EPM3032A, EPM3064A, EPM3128A, and EPM3256A devices have six output enables. EPM3512A devices have
10 output enables.
When the tri–state buffer control is connected to ground, the output is
tri-stated (high impedance), and the I/O pin can be used as a dedicated
input. When the tri–state buffer control is connected to V_CC, the output is
enabled.
The MAX 3000A architecture provides dual I/O feedback, in which
macrocell and pin feedbacks are independent. When an I/O pin is
configured as an input, the associated macrocell can be used for buried
logic.
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Altera Corporation