AK1543 Datasheet, PDF (9/35 Pages) Asahi Kasei Microsystems – 1300MHz Delta-Sigma FractionalSigma -N Frequency Synthesizer

[AK1543]
3. Analog Circuit Characteristics
The resistance of 27kΩ is connected to the [BIAS] pin, VDD1=2.7V to 5.5V, VDD2=VDD1 to 5.5V, –40°C ≤ Ta ≤ 85°C
Parameter
Min. Typ. Max. Unit
Remarks
RF Characteristics
Input Sensitivity
-10
+5 dBm
Input Frequency
400
1300 MHz Prescaler 8/9,16/17
REFIN Characteristics
Input Sensitivity
0.4
2
Vpp
Input Frequency
Maximum Allowable Prescaler Output
Frequency
5
40
162.5
Phase Detector
MHz
MHz
Phase Detector Frequency
3 MHz
Charge Pump
Charge Pump 1 Maximum Value
168.9
A
Charge Pump 1 Minimum Value
10.6
A
Charge Pump 2 Maximum Value
2.32
mA
Charge Pump 2 Minimum Value
0.84
mA
Icp TRI-STATE Leak Current
Mismatch between Source and Sink Currents
Note 1)
Icp vs. Vcpo Note 2)
1
nA 0.5 ≤ Vcpo ≤ VDD2-0.5
10
% Vcpo = VDD2/2, Ta = 25°C
15
% 0.5 ≤ Vcpo ≤ VDD2-0.5, Ta = 25°C
Others
VREF1,2 Rise Time
50
s
Current Consumption
IDD1
10
A [PDN1]=“Low”, [PDN2]=”Low"
IDD2
4.1
6
mA Note 3)
IDD3
1
mA Note 4)
Note 1) Mismatch between Source and Sink Currents: [(|Isink|-|Isource|)/{(|Isink|+|Isource|)/2}] × 100 [%]
Note 2) See “Fig. 4 Charge Pump Characteristics - Voltage vs. Current”: Icp vs. Vcpo:
[{1/2×(|I1|-|I2|)}/{1/2×(|I1|+|I2|)}]×100 [%]
Note 3) [PDN1]=”High”, [PDN2]=”High” IDD for [PVDD]
Note 4) [PDN1]=”High”, [PDN2]=”High” IDD for [CPVDD]
IDD does not include the operation current in fast lockup mode.
Note 5) [PDN1]=”High”, [PDN2]=”High” , the total current consumption = IDD2+IDD3+charge pump setting
Note 6) In the shipment test, the exposed pad on the center of the back of the package is connected to ground.
MS1206-E-02
9
2013/03