AK4645 Datasheet, PDF (82/96 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP-AMP

ASAHI KASEI
[AK4645]
SYSTEM DESIGN
Figure 73 and Figure 74 shows the system connection diagram for the AK4645. An evaluation board [AKD4645] is
available which demonstrates the optimum layout, power supply arrangements and measurement results.
Power Supply ^10u
2.6 ∼ 3.6V
Headphone
Power Supply
1.6 ∼ 3.6V
10 0.22u
10 0.22u
1u
Line In
Speaker
Mono In
External MIC
Internal MIC
External
SPK-Amp
0.1u
25 LIN4
TVDD 16
26 ROUT
DVDD 15
0.1u
27 LOUT
BICK 14
28 MIN
AK4645EN
LRCK 13
DSP
29 RIN2
Top View
SDTO 12
30 LIN2
SDTI 11
31 LIN1
CDTI 10
32 RIN1
CCLK 9
µP
Cp
Analog Ground Digital Ground
Notes:
- AVSS and HVSS of the AK4645 should be distributed separately from the ground of external controllers.
- All digital input pins should not be left floating.
- When the AK4645 is EXT mode (PMPLL bit = “0”), a resistor and capacitor of VCOC pin is not needed.
- When the AK4645 is PLL mode (PMPLL bit = “1”), a resistor and capacitor of VCOC pin is shown in Table 5.
- When the AK4645 is used at master mode, LRCK and BICK pins are floating before M/S bit is changed to “1”.
Therefore, 100kΩ around pull-up resistor should be connected to LRCK and BICK pins of the AK4645.
Figure 73. Typical Connection Diagram (AIN3 bit = “0”, MIC Input)
MS0543-E-00
- 82 -
2006/09