AK8996 Datasheet, PDF (8/74 Pages) Asahi Kasei Microsystems – Pressure Sensor Interface IC

[AK8996/W]
Reference Section & Others
Block
Functions
V_Bandgap
(VBG)
V_Reference
(VREF)
I_Reference
(IREF)
Generates the reference voltage or bias current required for each circuit.
Adjust the VREF voltage so that it is equivalent to 1.0V.
VREF voltage adj. Resolution: 3-bits
Adj. step:
1% step
Adjust the IREF current so that it is equivalent to 20µA.
IREF current adj. Resolution: 4-bits
Adj. step:
2.7% steps typically
Oscillator to generate timing sync signals for internal operation and sampling
Oscillator frequencies for sensor output signals. Adjust the oscillating frequency to 1024kHz.
(OSC)
OSC adj.
Resolution: 4-bits
Adj. step:
5% steps
Temperature sensor for converting the ambient temperature to voltage. Adjust the
V_temp.
(VTMP)
temperature sensor output voltage (VTMP voltage) so that it is equivalent to VREF
voltage at 25ºC.
VTMP voltage adj.
Resolution: 6-bits
Adj. step:
0.2% (0.67°C) steps
Generates analog circuit reference voltage 1/2VDD. Connect 10nF capacitance to
V_Common
(VCOM)
this pin for stabilization.
Since the output cannot drive current, do not connect a resistive load.
The internal power-up circuit causes it to start up within the settling time for stable
analog operation (Start Up valid time).
Upon power-up or exit from standby mode (low to high at the STBYN pin), this
circuit generates the settling time for stable analog operation using the internal
Power Up circuit. This circuit oversees the startup time for VREF or IREF and
disables the OSC to prevent improper operation. When the settling time for stable
Power ON
Delay
(PODLY)
analog operation expires, the OSC is enabled.
Start up the supply voltage within 200 µsec (0.8*VDD<). If power-up is not started
within 200 µsec, the AK8996 may enter the test mode. Note that the AK8996 may not
function properly in the test mode (For the description of the function, refer to the
Functional Description 9) Note on the AK8996 Power-up).
When recycling the power with the VDD pin and STBYN pin interconnected, it should be
monitored to ensure that the supply voltage is below 0.1*VDD to enable the power-on
reset.
Serial I/F Serial interface for accessing EEPROM.
EEPROM & EEPROM and control register (volatile memory).
Control
Register
Used to store compensation values and measurement modes and to set up the
measurement modes for adjustment.
MS1055-E-02
8
2011/12