AK8996 Datasheet, PDF (41/74 Pages) Asahi Kasei Microsystems – Pressure Sensor Interface IC

[AK8996/W]
Note)
The output reference voltage X (VO pin output) that is settled to during the period in the diagram,
which is dependent on the output reference voltage rough & fine adjustment register (Address: 1B,
1Ch data: ELV[10:0]), is given by:
ELVR[9: 6]
Dec Hex Bin
0
0 0000
1
1 0001
2
2 0010
3
3 0011
4
4 0100
5
5 0101
6
6 0110
7
7 0111
8
8 1000
9
9 1001
10
A 1010
11
B 1011
12
C 1100
13
D 1101
14
E 1110
15
F 1111
ELVR[10]=0
(*VDD)
0.5
0.4
0.4
0.4
0.4
0.3
0.3
0.3
0.3
0.2
0.2
0.2
0.2
0.1
0.1
0.1
VO pin
ELVR[10]=1
(*VDD)
0.5
0.5
0.5
0.5
0.6
0.6
0.6
0.6
0.7
0.7
0.7
0.7
0.8
0.8
0.8
0.8
Comments
Default
2. VOUT pin SINAD
Summarized in this table is the relationship between the VO pin’s external capacitance and SINAD.
Note that the SINAD should be 46dB or larger if 0.5% FS adjustment accuracy is required.
Sampling
Freq.
VO pin
Ext. cap
Cutoff
Freq.
(typical)
SINAD characteristics
Typical case
Worst case
Note)
5µF
0.995Hz
49.59dB
46.39dB
100Hz
3µF
1.658Hz
45.15dB
1µF
4.974Hz
35.61dB
100nF
49.74Hz
15.73dB
1µF
4.974Hz
55.61dB
1kHz
100nF
49.74Hz
35.61dB
10nF
497.4Hz
15.73dB
100nF
49.74Hz
55.82dB
10.24kHz
10nF
1nF
497.4Hz
4.97kHz
35.82dB
15.93dB
500pF
9.95kHz
10.23dB
Note) Worst case for external capacitance ±10% and lot variations.
41.95dB
32.41dB
12.66dB
52.41dB
32.41dB
12.66dB
52.62dB
32.62dB
12.85dB
7.46dB
As mentioned in Sections "1. VOUT pin output voltage stabilization time" and "2. VOUT pin SINAD",
the VO pin external capacitance value should be reduced to decrease the measurement time. For
increased SINAD, the VO pin external capacitance value should be greater.
On determining the VO pin external capacitance value, the various conditions should be thoroughly
reviewed according to the application requirements.
MS1055-E-02
41
2011/12