AK8443 Datasheet, PDF (8/29 Pages) Asahi Kasei Microsystems – 16bit 30MSPS video ADC with CCD/CIS interface

[AK8443]
(AVDD=DVDD=3.3V, Ta= 25°C, MCLK=30MHz unless otherwise specified.)
Item
Maximum gain
Symbol
Condition
min
typ
max Unit
PGA
GMAX ^CCDIN~ADC
20.3 21.3 22.3
dB
Relative value to 0dB
setting
Step width
GSTA The
Monotonicity 0.001 0.06
dB
guarantee
ADC
Resolution
RES
Differential
DNL
CCDIN~ADC
−16
nonlinearity
12bit accuracy
No missing code
16
bit
+16 LSB
Noise, Internal offset, Crosstalk
No input noise NI
(note 1)
PGA gain=0dB
PGA gain=21.3dB
9
LSB_rms
65
Offset voltage VOFST CDS, Clamp(normal input) －120
120
mV
(note 2)
CDS, Clamp(Large input) －145
145
DC Direct
−100
100
PGA gain=0dB
Crosstalk
XTALK1 (note 3)
128
LSB
XTALK2 (note 4)
64
LSB
Power consumption
Normal
AVDD
(note 5)
97.1 123
mA
operation
DVDD
(note 6)
13.4 27.5
Power down
IPD
0.1
mA
These characteristics are a value at the time of the external part value which was shown in
the external-circuit instance.
(note 1) This is defined as sigma of the ADC output cord scattering at no input.
(note 2) Definition is that the Offset DAC setting value in no input signal condition exists between
Offset DAC setting values, (equivalent to an input-referred – 120mV) and (equivalent to an
input-referred + 120mV) where ADC output code changes from 000h to 001h. Since a total
adjustable range of Offset Adjust DAC includes this internal Offset adjust range, a practical
adjustable range of input signal is reduced by the internal Offset amount.
(note 3) Definition at MCLK=30MHz, 3ch, CDS mode. PGA gain of the channel to be measured is
set at its maximum value, all other channels’ PGA gains are set at minimum values. Then
measure how much the output code of the target channel to be measured fluctuates when input
to the measures channel is fixed and a full-scale minus 1 dB step signal is input on all other
channels.
(note 4) Definition at MCLK=30MHz, 3ch, CDS mode. All channels’ PGA gains at minimum
values. Then measure how much the output code of the target channel to be measured fluctuates
when input to the measures channel is fixed and a full-scale minus 1 dB step signal is input on all
other channels.
(note 5) At MCLK=30MHz, and 1.569 Vpp, 1MHz sine-wave signal fed on all 3 channel.
(note 6) At the capacitive load is 20pF.
MS1280-E-00
8
2011/8