AK8443 Datasheet, PDF (18/29 Pages) Asahi Kasei Microsystems – 16bit 30MSPS video ADC with CCD/CIS interface

- Power on reset
AVDD
100kΩ
RESETB
0.33μF
AK8443
AVDD
0.9xAVDD
[AK8443]
AVDD rise time
max. 10ms
RESETB
max. 100ms
It becomes possible for
the register writing
after 100 ms.
Power on reset
At the power-on, Power-On-Reset must be executed by using RESETB pin. When a 0.33 μF
external capacitor on RESETB pin is used, the rise time of AVDD must be shorter than 10 ms in
order to assure proper Power-On-Reset operation. Maximum time from AVDD power-on to the
release from Power-On-Reset is 100 ms. Registers should be written after waiting for longer than
100 ms after AVDD power-on.
As electric charge is retained in the external capacitor even after AVDD is made to 0V, voltage on
RESETB pin does not go to 0V immediately. If AVDD is powered-up again before RESETB pin
returns to 0V, a proper Power-On-Reset operation is not made. In order to assure proper
Power-On-Reset operation when to power-up AVDD again, it is required that AVDD time to be
kept at 0V is longer than 300 ms. If the 300 ms AVDD time to be kept at 0V, is not obtainable, the
device must be reset by applying a low pulse externally on RESETB pin.
When the condition doesn’t fill above, please make the RESETB high after power supply start-up,
Without CAP connect to RESETB pin.
MS1280-E-00
18
2011/8