AK4348 Datasheet, PDF (8/31 Pages) Asahi Kasei Microsystems – 3.3V 192kHz 24-Bit 8-Channel DAC

ASAHI KASEI
[AK4348]
Note 14. BICK rising edge must not occur at the same time as LRCK edge.
Note 15. Data must be held for sufficient time to bridge the 300 ns transition time of SCL.
Note 16. The AK4348 can be reset by bringing RSTB pin = “L”.
Note 17. I²C is a registered trademark of Philips Semiconductors.
„ Timing Diagram
MCLK
LRCK
BICK
LRCK
BICK
SDTI
1/fCLK
tCLKH
tCLKL
1/fs
tBCK
tBCKH
tBCKL
Clock Timing
VIH
VIL
dCLK=tCLKH x fCLK, tCLKL x fCLK
VIH
VIL
VIH
VIL
VIH
VIL
tBLR
tLRB
VIH
VIL
tSDS
tSDH
VIH
VIL
Audio Serial Interface Timing
MS0532-E-00
-8-
2006/07