AK4348 Datasheet, PDF (18/31 Pages) Asahi Kasei Microsystems – 3.3V 192kHz 24-Bit 8-Channel DAC

ASAHI KASEI
[AK4348]
„ System Reset
The AK4348 should be reset once by bringing RSTB pin = ”L” upon power-up. The AK4348 is powered up and the
internal timing starts clocking by LRCK “↑” after exiting reset and power down state by MCLK. The AK4348 is in the
power-down mode until MCLK and LRCK are input.
„ Power ON/OFF timing
All DACs are placed in the power-down mode by bringing RSTB pin “L” and the registers are initialized. The analog
outputs go to VCOM. Since some click noise occurs at the edge of the RSTB signal, the analog output should be muted
externally if the click noise influences system application.
Each DAC can be powered down by setting each power-down bit (PW1-4 bits) to “0”. In this case, the registers are not
initialized and the corresponding analog outputs go to VCOM. Since some click noise occurs at the edge of the RSTB
signal, the analog output should be muted externally if the click noise influences system application.
Power
RSTB pin
Internal
State
Normal Operation
DAC In
(2)
(Digital)
DAC Out
(3)
(Analog)
Clock In
Don’t care
MCLK,LRCK,BICK
DZF1/DZF2
External
Mute
(5)
“0”data
Mute ON
(1)
GD
Reset
(2)
“0”data
GD
(3)
(4)
Don’t care
(6)
Mute ON
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs are VCOM at power-down mode.
(3) Click noise occurs at the edge of RSTB signal. This noise is output even if “0” data is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the power-down mode (RSTB pin = “L”).
(5) Mute the analog output externally if the click noise (3) influences the system application.
The timing example is shown in this figure.
(6) DZF pins are “L” in the power-down mode (RSTB pin = “L”). (DZFB bit = “0”)
Figure 12. Power-down/up Sequence Example
MS0532-E-00
- 18 -
2006/07