AK4348 Datasheet, PDF (20/31 Pages) Asahi Kasei Microsystems – 3.3V 192kHz 24-Bit 8-Channel DAC

ASAHI KASEI
[AK4348]
„ Register Control Interface
The AK4348 controls its functions via registers. Two types of control mode can be used to write to the internal registers.
In I²C-bus mode, the chip address is determined by the state of the CAD0-1 pins. In 3-wire mode, the chip address can
be selected by the state of the CAD1 pin. RSTB pin = “L” initializes the registers to their default values. Writing “0” to
the RSTN bit resets the internal timing circuit, but the registers are not initialized.
* The AK4348 does not support the read command.
* When the AK4348 is in the power down mode (RSTB bit = “L”) or the MCLK is not provided, writing to control
registers is prohibited.
* When the state of P/S pin is changed, the AK4348 should be reset by RSTB bit = “L”.
* In serial control mode, the setting of parallel pins is invalid.
Function
Double sampling mode at 128/192fs
De-emphasis
SMUTE
Zero Detection
24bit LSB justified format
TDM256 mode
TDM128 mode
Parallel control mode
-
O
O
-
-
O
-
Serial control mode
O
O
O
O
O
O
O
Table 12. Function Table (O: Supported, -: Not supported)
(1) 3-wire Serial Control Mode (I2C pin = “L”)
Internal registers may be written to via the 3-wire µP interface pins (CSN, CCLK and CDTI). The data on this interface
consists of Chip Address (2-bits, C1/0; C1=CAD1 and C0 is fixed to “1”), Read/Write (1-bit; fixed to “1”, Write only),
Register Address (MSB first, 5-bits) and Control Data (MSB first, 8-bits). The AK4348 latches the data on the rising edge
of CCLK, so data should clocked in on the falling edge. The writing of data becomes valid by the rising edge of CSN. The
clock speed of CCLK is 5MHz (max).
CSN
CCLK
CDTI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (C1=CAD1, C0=“1”)
READ/WRITE (Fixed to “1”, Write only)
Register Address
Control Data
Figure 14. Control I/F Timing
MS0532-E-00
- 20 -
2006/07