AK4458VN Datasheet, PDF (79/83 Pages) Asahi Kasei Microsystems – 115dB 768kHz 32-bit 8ch Premium DAC

[AK4458]
1. Grounding and Power Supply Decoupling
To minimize coupling by digital noise, decoupling capacitors should be connected to AVDD and TVDD
respectively. AVDD are supplied from the analog supply of the system and TVDD is supplied from the digital
supply of the system. DVSS and AVSS must be connected to the same potential. Decoupling
capacitors especially small ceramic capacitors for high frequency should be placed as near as possible to the
supply pin.
2. Voltage Reference
The potential difference between the VREFH1/2/3/4 pin and the VREFL1/2/3/4 pin sets the analog output
range. The VREFH1/2/3/4 pin is normally connected to AVDD, and the VREFL1/2/3/4 pin is normally
connected to AVSS. VREFH1/2/3/4 and VREFL1/2/3/4 should be connected with a 0.1µF ceramic capacitor as
near as possible to the pin to eliminate the effects of high frequency noise. All signals, especially clocks, should
be kept away from the VREFH1/2/3/4 and VREFL1/2/3/4 pins in order to avoid unwanted noise coupling into
the AK4458.
014011794-E-00
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2015/01