AK4458VN Datasheet, PDF (78/83 Pages) Asahi Kasei Microsystems – 115dB 768kHz 32-bit 8ch Premium DAC

[AK4458]
10. Recommended External Circuits
■ Typical Connection Diagram
Figure 73 shows system connection diagram, and Figure 74 shows the analog output circuit example.
Digital 3.3V
Analog 5.0V Analog 5.0V
R4ch
LPF
R4ch
Mute
R4ch Out
10u
+
1u
+
0.1u
0.1u
L4ch
LPF
L4ch
Mute
L4ch Out
DSP
Micro-
Controller
1 MCLK
2 BICK
3 LRCK
4 SDTI1
5 SDTI2
6 SDTI3
7 SDTI4
8 DSDR3
9 DSDL4
10 DSDR4
11 DZF
12 CAD1
AOUTR3N 36
VREFL3 35
VREFH3 34 ^0.1u
AOUTL3N 33
AOUTL3P 32
AVDD 31
+
AVSS 30 ^{0.1u 10u}
AOUTR2P 29
N
AOUTR2N 28
VREFH2 27
0.1u
VREFL2 26
AOUTL2N ₂₅
0.1u
R3ch
LPF
R3ch
Mute
R3ch Out
L3ch
LPF
L3ch
Mute
L3ch Out
R2ch
LPF
R2ch
Mute
R2ch Out
L2ch
LPF
L2ch
Mute
L2ch Out
R1ch
LPF
R1ch
Mute
R1ch Out
Digital
Ground
Analog
Ground
L1ch
LPF
L1ch
Mute
+
Electrolytic Capacitor
Ceramic Capacitor
L1ch Out
Notes:
- Chip Address = “00”. BICK = 64fs, LRCK = fs
- Power lines of AVDD and VREFH1-4 should be distributed separately from LDO and etc. while keeping
low impedance. If it is not possible, it is recommended to connect a LPF composed by a 10Ω resistor and a
220uF capacitor between VREFL1-4 and VREFH1-4.
- DVSS and AVSS must be connected to the same potential.
- All digital input pins should not be allowed to float.
Figure 73. Typical Connection Diagram (AVDD=5V, TVDD=3.3V)
014011794-E-00
- 78 -
2015/01