AK4388A Datasheet, PDF (7/18 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit 2ch ΔΣ DAC

■ Timing Diagram
MCLK
LRCK
BICK
[AK4388A]
1/fCLK
tCLKH
tCLKL
1/fs
VIH
VIL
dCLK=tCLKH x fCLK, tCLKL x fCLK
VIH
VIL
tBCK
VIH
VIL
tBCKH
tBCKL
Figure 1. Clock Timing
VIH
LRCK
VIL
tBLR
tLRB
BICK
VIH
VIL
tSDS
tSDH
VIH
SDTI
VIL
Figure 2. Serial Interface Timing
tRST
RSTN
VIL
Figure 3. Power-down Timing
MS1008-E-02
-7-
2010/09