EQ0321 Datasheet, PDF (6/20 Pages) Asahi Kasei Microsystems – Programmable linear Hall IC for 1 axis

[EQ0321]
Temperature Drift of Vhd
(Note 3)(Note 4)
±2
%
Output Sensitivity
Ta=-30～85°C, 25°C standard
Temperature Drift of Vofd (Note 3)(Note 5)
±30
mV
Offset Voltage
Ta=-30～85°C, 25°C standard
Output Noise Voltage
(Note 3) (Note 6)
0.2
mVrms
Badd=150mT
Bandwidth
fT
(Note 3)
10
kHz
(Note 1) The Slope of a line that calculated by least-square method by Vout1 (Bsub=0, Badd=80), Vout2
(Bsub=8, Badd=80) and Vout3 (Bsub=-8, Badd=80) is equal Vh.
Vout = { Bsub / Badd } × GAIN × 1000 + VOUT0 [mV]
(Note 2) Figure 3 is a timing chart about power on. “tpon” is a time to reach less than ±1% of the offset
voltage after a reset release. “tRST” is a reset release time after V_DD is stable.
VDD
RSTN
tRSTL
(Refer to Table 7)
VOUTX/Y
tRST tpon
±1% of offset voltage
Figure 3. Operation when the device is powered up
(Note 3) These parameters are not tested in mass production.
(Note 4) Vhd = {(Vh(Ta) – Vh(25^oC)) / Vh(25^oC) } × 100 [%]
(Note 5) Vofd = VOUT 0(Ta) – VOUT 0(25 ^oC) [mV]
(Note 6) The external LPF circuit (fc = 2kHz)
EQ0321
VOUT
8.2 kΩ
0.01µF
VSS
Figure 4. LPF circuit
MS1436-E-00
-6-
2013/04