EQ0321 Datasheet, PDF (4/20 Pages) Asahi Kasei Microsystems – Programmable linear Hall IC for 1 axis

[EQ0321]
5.1 Pin Configurations
5. Pin Configurations and Functions
RSTN 1
CSN 2
SCK 3
SI
4
SO 5
10 VDD
9 VSS
8 VCOM
7 TSTO
6 VOUT
TOP VIEW
Figure 2. Bump down view
5.2 Pin Function
Table 2. Pin configurations and functions of the EQ0321
Pin
Pin
Type
I/O
No. Name (Note 1) (Note 2)
Description
1
RSTN
D
I
When the input signal is “Low”, the power down mode is active.
Please make the input “Low” before power on.
2
CSN
D
I
The chip select pin for serial interface.
3
SCK
D
I
The clock input pin for serial interface.
4
SI
D
I
The data input pin for serial interface.
5
SO
D
O
The data output pin for serial interface.
6 VOUT
A
O
This pin outputs the voltage which is proportional to the position
of the magnet.
Maximum capacity load = 20pF.
Minimum resistance load = 100kΩ.
7
TSTO
A
O
This is a test pin.
8 VCOM
A
This pin should be connected to V_SS.
O
This pin outputs the internal reference voltage (V_DD/2).
Please connect 0.01µF to ground.
No resistance load.
9
VSS
GND
－ Ground
10 VDD
PWR
－ Power supply
(Note 1) A(analog pin), D(digital pin), GND(ground pin), PWR(power pin)
(Note 2) I(input pin), O(output pin).
MS1436-E-00
-4-
2013/04