AKD4634-A Datasheet, PDF (6/46 Pages) Asahi Kasei Microsystems – 16bit mono CODEC with MIC/SPK/VIDEO amplifier.

[AKD4634-A]
(3) Evaluation of loop-back mode (A/D → D/A) : PLL, Slave Mode
(PLL Reference CLOCK: BICK or FCK pin)
a) Set up jumper pins of MCKI clock
An external clock through a RCA connector (J8: EXT/BICK), BICK and FCK clocks are generated by the
divider. JP23 (EXT1) and R26 should be properly selected in order to much the output impedance of the clock
generator.
JP17
XTE
JP21
MCLK_SEL
JP18
MKFS
XTL DIR EXT 256fs 512fs1024fs MCKO
*When BICK and FCK clocks through a RCA connector (J8, J9) is supplied, select XTL on JP21.
*When X’tal is used, X’tal of 256fs, 512fs or 1024fs can be set in X1. Set OPEN on JP17, and select XTL on
JP21.
b) Set up jumper pins of BICK clock
Input frequency of BICK should be set 64fs/32fs/16fs by JP19.
JP19
BICK_SEL
JP20
BICK
JP27
BICK
JP29
BICK_INV
64fsɹ 32fs^ɹɹ16fs^ɹɹ EXT ^{INV THR DIR ADC INV THR}
*When BICK and FCK clocks through a RCA connector (J8, J9) is supplied, select EXT on JP19. JP23 (EXT1)
and R26 should be properly selected in order to much the output impedance of the clock generator.
c) Set up jumper pins of FCK clock
JP22
FCK_SEL
JP28
FCK
2fs 1fs EXT
DIR ADC
*When BICK and FCK clocks through a RCA connector (J8, J9) is supplied, select EXT on JP22. JP24 (EXT1)
and R27 should be properly selected in order to much the output impedance of the clock generator.
d) Set up jumper pins of DATA
When the AK4634 is evaluated by loop-back mode (A/D → D/A), the jumper pins should be set to the following.
JP30
SDTI
JP26
4632_SDTI
DIR
ADC
DAC/LOOP ^ADC
<KM088301>
-6-
2007/07