AK8181H Datasheet, PDF (6/12 Pages) Asahi Kasei Microsystems – 2.5V, 3.3V LVPECL 1:10 Clock Fanout Buffer

AK8181H
AC Characteristics
All specifications at VDD = 2.375V to 3.8V or, VSS = 0V, Ta: -40 to +85℃, unless otherwise noted
Parameter
Symbol
Conditions
MIN TYP MAX Unit
Output Frequency
Propagation Delay ⁽¹⁾
Output Skew ^{(2) (3)}
Part-to-Part Skew ^{(3) (4)}
Buffer Additive Jitter, RMS ⁽⁵⁾
Output Rise/Fall Time ⁽⁵⁾
fOUT
tPD
tsk(O)
tskPP
tjit
tr, tf
155.52MHz (12kHz – 20MHz)
20% to 80%
700 MHz
T.B.D ns
30
ps
340 ps
0.045
ps
150
500 ps
Output Duty Cycle
DCOUT
47
50
53
%
All parameters measured at f ≤ 700MHz unless noted otherwise.
The cycle to cycle jitter on the input will equal the jitter on the output. The part does not add jitter.
(1) Measured from the differential input crossing point to the differential output crossing point.
(2) Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output
differential cross points.
(3) This parameter is defined in accordance with JEDEC Standard 65.
(4) Defined as skew between outputs on different devices operating at the same supply voltages and with equal load
conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points.
(5) Design value.
Feb-2013
draft-E-02
-6-