AK8181H Datasheet, PDF (1/12 Pages) Asahi Kasei Microsystems – 2.5V, 3.3V LVPECL 1:10 Clock Fanout Buffer

AK8181H
2.5V, 3.3V LVPECL 1:10
Preliminary Clock Fanout Buffer
AK8181H
Features
Ten differential 2.5V, 3.3V LVPECL outputs
Two Selectable differential inputs
PCLKxp/n pairs can accept the following
differential input levels; LVPECL, LVDS,
LVHSTL, SSTL, HCSL
Clock output frequency up to 700MHz
Translates any single-ended input signal to
3.3V LVPECL levels with resistor bias on
PCLKxn input
Output skew : 30ps typical
Part-to-part skew : 340ps maximum
Propagation delay : (T.B.D)ns maximum
Additive phase jitter(RMS) : 0.045ps (typical)
Operating Temperature Range: -40 to +85℃
Package: 32-pin LQFP (Pb free)
Pin compatible with ICS85310I-01
Description
The AK8181H is a member of AKM’s LVPECL
clock fanout buffer family designed for telecom,
networking and computer applications, requiring a
range of clocks with high performance and low
skew. The AK8181H distributes 10 buffered clocks.
AK8181H are derived from AKM’s long-term-
experienced clock device technology, and enable
clock output to perform low skew. The AK8181H is
available in a 32-pin LQFP package.
Block Diagram
draft-E-02
-1-
Feb-2013