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AK4645AEZ Datasheet, PDF (53/85 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP-AMP | |||
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[AK4645A]
â à ©à²ÏÏϥϧϥΠϯà¥à¾ (LOP/LON pins)
LODIF bit = â1â Í· ͱ Í Éº LOUT/ROUT pins ͸ ͦ Πͧ Î LOP/LON pins Í´ ͳ ΠΠ͢ É» DAC Πͨ ͸
LIN2/RIN2/LIN3/RIN3/LIN4/RIN4ÍÎͷ৴߸ÎÏÏϥϧ৴߸[(L+R)/2]Í´à¸¡Í ×µÉºLOP/LON pinsÍÎà ©à²à¥à¾
Í Î͢ɻÎͨɺà·Õà°ß
͸֤ÏÏ¯Í´à¬°Í Í¯min. 10kΩͰ͢ɻPMLO bit = â0â Í´Í¢ÎͱÏÏ«Êμ΢ϯà§à¬¶Í´Í³Îɺ
LOP/LON pins͸Hi-ZʹͳÎÎ͢ɻPMLO bit = â1â, LOPS bit = â1âͱ͢ÎͱɺÏÏ«ÊηÊÏÏÊÏ
ʹͳÎÎ͢ɻ
PMLO bit = â1â, LOPS bit = â0âͱ͢ÎͱɺÏÏ«ÊÎοÏÍ Î͢ɻÏÏϥϧϥΠϯà¥à¾Í¸LOVL bitʹͯήΠϯÎ
à¯à©Í¢ÎÍͱÍÍ°ÍÎ͢ɻ
L4DIF=LODIF bits = â1âͷͱÍÉºà ©à²à¥à¾à§´ß¸Í¸(LOP) â (LON) = (IN4+) â (IN4â)ͱͳÎÎ͢ɻ
DAC
âDACLâ
âLOVLâ
LOP pin
LON pin
PMLO
0
1
Figure 46. Mono Line Output
LOPS
Mode
LOP
LON
x
Power-down
Hi-Z
Hi-Z
1
Power-save
Hi-Z
VCOM
0
Normal Operation Normal Operation Normal Operation
Table 45. Mono Line Output Mode Setting (x: Donât care)
(default)
LOVL
0
1
Gain
Output Voltage (typ)
+6dB
1.2 x AVDD
(default)
+8dB
1.5 x AVDD
Table 46. Mono Line Output Volume Setting
PMLO bit
LOPS bit
LOP pin
Hi-Z
Hi-Z
LON pin Hi-Z
VCOM
VCOM
Hi-Z
Figure 47. Power-up/Power-down Timing for Mono Line Output
MS0986-J-00
- 53 -
2008/07
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