AK4645AEZ Datasheet, PDF (13/85 Pages) Asahi Kasei Microsystems – Stereo CODEC with MIC/HP-AMP

[AK4645A]
DCಛੑ
(Ta=25°C; AVDD=DVDD=2.6 ∼ 3.5V; TVDD=1.6 ∼ 3.5V; HVDD=2.6 ∼ 5.25V)
Parameter
Symbol
min
typ
High-Level Input Voltage 2.2V≤TVDD≤3.5V VIH 70%TVDD
-
1.6V≤TVDD<2.2V VIH 75%TVDD
-
Low-Level Input Voltage
2.2V≤TVDD≤3.5V VIL
-
-
1.6V≤TVDD<2.2V VIL
-
-
High-Level Output Voltage
(Iout=−200μA) VOH TVDD−0.2
-
Low-Level Output Voltage
(Except SDA pin: Iout=200μA) VOL
-
-
(SDA pin: Iout=3mA) VOL
-
-
Input Leakage Current
Iin
-
-
max
-
-
30%TVDD
25%TVDD
-
Units
V
V
V
V
V
0.2
V
0.4
V
±10
μA
εΠονϯάಛੑ
(Ta=25°C; AVDD=DVDD=2.6 ∼ 3.5V; TVDD=1.6 ∼ 3.5V; HVDD=2.6 ∼ 5.25V; C_L=20pF; unless otherwise specified)
Parameter
Symbol
min
typ
max
Units
External Slave Mode
MCKI Input Timing
Frequency
256fs
384fs
512fs
1024fs
Pulse Width Low
Pulse Width High
fCLK
1.8816
-
fCLK
2.8224
-
fCLK
3.7632
-
fCLK
7.5264
-
tCLKL 0.4/fCLK
-
tCLKH 0.4/fCLK
-
12.288
18.432
13.312
13.312
-
-
MHz
MHz
MHz
MHz
ns
ns
LRCK Input Timing
Frequency
256fs
384fs
512fs
1024fs
DSP Mode: Pulse Width High
Except DSP Mode: Duty Cycle
fs
fs
fs
fs
tLRCKH
Duty
7.35
7.35
7.35
7.35
tBCK−60
45
-
48
kHz
-
48
kHz
-
26
kHz
-
13
kHz
-
1/fs − tBCK ns
-
55
%
BICK Input Timing
Period
Pulse Width Low
Pulse Width High
tBCK
312.5
-
tBCKL
130
-
tBCKH
130
-
-
ns
-
ns
-
ns
External Master Mode
MCKI Input Timing
Frequency
256fs
384fs
512fs
1024fs
Pulse Width Low
Pulse Width High
LRCK Output Timing
Frequency
DSP Mode: Pulse Width High
Except DSP Mode: Duty Cycle
BICK Output Timing
Period
BCKO bit = “0”
BCKO bit = “1”
Duty Cycle
fCLK
fCLK
fCLK
fCLK
tCLKL
tCLKH
1.8816
2.8224
3.7632
7.5264
0.4/fCLK
0.4/fCLK
fs
7.35
tLRCKH
-
Duty
-
tBCK
-
tBCK
-
dBCK
-
-
-
-
-
-
-
-
tBCK
50
1/(32fs)
1/(64fs)
50
12.288
18.432
13.312
13.312
-
-
48
-
-
-
-
-
MHz
MHz
MHz
MHz
ns
ns
kHz
ns
%
ns
ns
%
MS0986-J-00
- 13 -
2008/07