AK1544 Datasheet, PDF (5/37 Pages) Asahi Kasei Microsystems – 1300MHz Integer-N Frequency Synthesizer

[AK1544]
Note 1) For detailed functional descriptions, see the section “Charge Pump and Loop Filter” in “8. Block Functional
Description” below.
Note 2) The input voltage from the [CPZ] pin is used in the internal circuit. The [CPZ] pin must not be open even
when the fast lockup feature is unused. For the output destination from the [CPZ] pin, see
“P.12 Fig.5 Loop Filter Schematic”. The [SWIN] pin could be open even when the first lockup feature is not
used.
Note 3) The switch for Loop Filter setting is ON when “PDN1=0, PDN2=0” or “PDN1=1, PDN2=”.
Note 4) Power down refers to the state where [PDN1]=[PDN2]=”Low” after power-on.
AI: Analog input pin
DO: igital output pin
AO: Analog output pin
P: Power supply pin
AIO: Analog I/O pin
G: Ground pin
DI: Digital input pin
24 23 22 21 20 19
CPVDD 1
18 PVDD
TEST3 2
17 RFINP
TEST1 3
LE
4
TOP
VIEW
16 RFINN
15 VREF
DATA 5
14 DVSS
CLK
6
13 GPO2
7 8 9 10 11 12
Fig. 2 Package Pin Layout
MS1350-E-01
5
2013/03