AK1544 Datasheet, PDF (11/37 Pages) Asahi Kasei Microsystems – 1300MHz Integer-N Frequency Synthesizer

[AK1544]
8. Block Functional Descriptions
1. Frequency Setup
The following formula is used to calculate the frequency setting for the AK1544.
Frequency setting (external VCO output frequency) = FPFD x N
N
: Dividing number N = [ (P x B) + A ]
FPFD
: Phase detector frequency FPFD = [REFIN] pin input frequency / R counter dividing number
P
: Prescaler Value (See< Address2>:{Pre[1:0]})
B
: B (Programmable) counter value (See <Address1>:{B[12:0]})
A
: A (Swallow) counter value (See <Address1>:{A[5:0]})
○ Calculation examples
When the [REFIN] pin input frequency is 10MHz, the phase detector frequency FPFD =5kHz and the frequency setting
= 780.1MHz;
[The AK1544 Settings]
R=10000000/5000 = 2000 (<Address3> : {R[13:0]}=2000dec)
P=32 (<Address2> : Pre[1:0]=10bin)
B=4875 (<Address1> : B[12:0]=4875dec)
A=20 (<Address1> : A[5:0]=20dec)
Frequency setting= 5000 × [ (32×4875) + 20] = 780.1MHz
○ Division conditions
The conditions for division settings for A and B counters are as follows:
A ≥ 0 A counter (6 bits): A decimal number from 0 to 63 can be set.
B ≥ 3 B counter (13 bits): A decimal number from 3 to 8191 can be set.
B≥A
○ Lower limit for setting consecutive dividing numbers
In the AK1544, it is not possible to set consecutive dividing numbers below the lower limit.
The lower limit can be calculated by the following formula;
Nmin=P²-P
For example, in the case of P=16, 240 or over can be set as consecutive dividing number.
MS1350-E-01
11
2013/03