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AK4534 Datasheet, PDF (44/64 Pages) Asahi Kasei Microsystems – 16Bit CODEC with MIC/HP/SPK-AMP | |||
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ASAHI KASEI
[AK4534]
Addr
05H
Register Name
Mode Control 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
FS2
FS1
FS0 HPRM HPLM
0
LOOP SPPS
R/W
R/W
R/W
R/W
R/W
RD
R/W
R/W
0
0
0
0
0
0
0
0
SPPS: Speaker-amp Power-Save-Mode
0: Power Save Mode (Default)
1: Normal Operation
When the SPPS bit = â1â, the Speaker-amp is in power-save-mode and the SPP pin becomes Hi-z and SPN pin is
set to HVDD/2 voltage. When the PMSPK bit = â1â, this bit is valid. After the PDN pin changes from âLâ to âHâ,
the PMSPK bit is â0â, which powers down Speaker-amp
LOOP: Loopback ON/OFF
0: OFF (Default)
1: ON
When this bit is â1â, the ADC output is passed to the DAC input internally. The external input data to DAC is
ignored.
HPLM: Lch of HP-Amp output control
0: Enable output from Rch of Headphone-amp (Default)
1: Lch mono output of Headphone-amp. The PMHPR bit can be powered down at this time.
HPRM: Rch of HP-Amp output control
0: Enable output from Lch of Headphone-amp (Default)
1: Rch mono output of Headphone-amp. The PMHPL bit can be powered down at this time.
Output Channel
Register bit
Register : 00H
Register : 05H
Lch
Rch
PMHPL PMHPR HPLM
HPRM
ON
ON
1
1
0
0
ON
OFF
1
0
1
0
OFF
ON
0
1
0
1
OFF
OFF
0
0
Donât Care Donât Care
Table 21. Output control for Headphone-amp
FS2-0: Sampling frequency modes (see Table 3, 7)
Default: â000â (fs=44.1kHz)
MS0133-E-03
- 44 -
2003/5
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