AK5394A Datasheet, PDF (4/24 Pages) Asahi Kasei Microsystems – Super High Performance 192kHz 24-Bit ADC

ASAHI KASEI
[AK5394A]
No. Pin Name
1 VREFL+
2 VREFL−
3 VCOML
4 AINL+
5 AINL-
6 ZCAL
7 VD
8 DGND
9 CAL
10 RSTN
11 SMODE2
12 SMODE1
13 LRCK
PIN/FUNCTION
I/O
Function
Lch Positive Reference Voltage, 3.75V
O Normally connected to AGND with a large electrolytic capacitor and connected to
VREFL− with a 0.22µF ceramic capacitor.
Lch Negative Reference Voltage, 1.25V
O Normally connected to AGND with a large electrolytic capacitor and connected to
VREFL+ with a 0.22µF ceramic capacitor.
O Lch Common Voltage Pin, 2.75V
I Lch Analog positive input Pin
I Lch Analog negative input Pin
Zero Calibration Control Pin
This pin controls the calibration reference signal.
I
“L” :VCOML and VCOMR
“H” : Analog Input Pins (AINL±, AINR±)
- Digital Power Supply Pin, 3.3V
- Digital Ground Pin, 0V
Calibration Active Signal Pin
“H” means the offset calibration cycle is in progress. Offset calibration starts
O
when RSTN pin goes “H”. CAL goes “L” after 8704 LRCK cycles for DFS pin =
“L”, 17408 LRCK cycles for DFS pin = “H”.
Reset Pin
When “L”, the digital section is powered-down. Upon returning “H”, an offset
I
calibration cycle is started. An offset calibration cycle should always be initiated
after power-up.
Serial Interface Mode Select Pin
MSB first, 2’s compliment.
SMODE2 SMODE1
MODE
LRCK
I
L
L
Slave mode : MSB justified : H/L
I
L
H
Master mode : Similar to I²S : H/L
H
L
Slave mode : I²S
: L/H
H
H
Master mode : I²S
: L/H
Left/Right Channel Select Clock Pin
I/O
When RSTN pin = “L” in master mode, LRCK outputs “L”.
MS0137-E-01
-4-
2002/07