AK8448 Datasheet, PDF (36/53 Pages) Asahi Kasei Microsystems – 6-Channel Linear Sensor compatible 10 Bit 40 MSPS x 3 Analog Pre-Processor

ASAHI KASEI
„ R0, D5
D5
0
1
[AK8448]
Signal polarity
Signal
Polarity
Negative
Positive
Sensor Type
Signal swings to low voltage side from the reference level. CCD
sensors etc. ( default )
Signal swings to high voltage side from the reference level. CIS
sensors etc.
„ R0, D4 ~ D2
Cannel Number
D4 D3 D2
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
Cannel
Number
1( default )
2
3
4
6
CCDIN
012345
{- - - - -
{-{- - -
{-{-{-
{{{{ - -
{{{{{{
{: denotes input channel( s ) to be used in the selected # of channel mode.
Un-used functional blocks, CDS, DAC, PGA and ADC are automatically powered-down.
No capacitor connection is required on CCDINn & REFINn pins for the un-used channels.
Those, un-used pins should be connected to AVSS.
„ R0, D1
ADCK Frequency
D1
ADCK Input Frequency
Note
0 A/D Conversion Rate
( default )
Either 5 Bit-wide or 10 Bit-wide output data is
output both at the rising edge and the falling
edge of ADCLK.
1 Total Pixel Rate
10 Bit-wide output data is output at the rising
edge of ADCK.
In the default mode, ADCK at the same frequency as ADC conversion rate should be
input.
ADC data is output both at the rising edge and the falling edge of ADCK.
In total pixel rate mode, ADCK at the same frequency as a total sum of pixel rate of
effective channels should be input. ADC data is output at the rising edge of ADCK.
„ R0, D0
Power-Down
D0
Operation
0 Normal Operation ( default )
1 Power-Down
In Power-down mode, clock feed to the Digital part is stopped while Analog part is
powered-down.
ADC data output conditions ( DA0 ~ DA4, DB0 ~ DB4, DC0 ~ DC4 ) at power-down can
be selected to be either fixed low or high-Z output by D6 bit of register R1.
MS1513-E-00
36
2013/02