AK8826 Datasheet, PDF (35/157 Pages) Asahi Kasei Microsystems – HD/SD Multi Format Video Encoder with 3ch DAC

(5) RGB 18bit Data Input Format (RGB 6:6:6Ê£
[AK8826VN]
In case of encoding NTSC/PAL / 525i/625i , 525p/625p component signal, Clock rate to CLKIN pin 27MHz..
Using as High Speed DAC mode, the maximum conversion rate is 54MHz.
DATA17 - DATA0 pins are used as Data Input pins.
D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
The Register setting is defined as following table.
[I/O Data Fromat Register] Setting
INPFMT[1:0]-bit
DTFMT-bit
10
1
Note
18bit RGB Input
Output signal is set CONVMOD[1:0]-bit of I/O Data Format Register (R/W) [Sub Address 0x0B] and HD Mode Register
(R/W) [Sub Address 0x00] or SD Block Control Register (R/W) [Sub Address 0x11]
(5-1) 525i / 625i data input case
CLKIN
(27MHz)
Data[5:0]
B₀ B₀ B₁ B₁ B₂ B₂ ŋŋŋ ŋŋŋ B_n B_n B_n+1 B_n+1 B_n+2 B_n+2 ŋŋŋ ŋŋŋ ŋŋŋ
Data[11:6]
G0 G₀ G₁ G₁ G₂ G_{2 ŋŋŋ ŋŋŋ} G_n G_n G_n+1 G_n+1 G_n+2 G_{n+2 ŋŋŋ ŋŋŋ ŋŋŋ}
Data[17:12]
R0 R₀ R₁ R₁ R₂ R_{2 ŋŋŋ ŋŋŋ} R_n R_n R_n+1 R_n+1 R_n+2 R_{n+2 ŋŋŋ ŋŋŋ ŋŋŋ}
Fig. 30
(5-2) 525P / 625P data input case
CLKIN
(27MHz)
Data[5:0]
B₀ B₁ B₂ B₃ ŋŋŋ ŋŋŋ ŋŋŋ ŋŋŋ B_n B_n+1 B_n+2 B_n+3 B_n+4 B_n+5 ŋŋŋ ŋŋŋ ŋŋŋ
Data[11:6]
G0 G₁ G₂ G₃ G₄ G_{5 ŋŋŋ ŋŋŋ} G_n G_n+1 G_n+2 G_n+3 G_n+4 G_{n+5 ŋŋŋ ŋŋŋ ŋŋŋ}
Data[17:12]
R0 R₁ R₂ R₃ R₄ R_{5 ŋŋŋ ŋŋŋ} R_n R_n+1 R_n+2 R_n+3 R_n+4 R_{n+5 ŋŋŋ ŋŋŋ ŋŋŋ}
Fig. 31
MS0972-E-01
35
2008/12