AK8826 Datasheet, PDF (133/157 Pages) Asahi Kasei Microsystems – HD/SD Multi Format Video Encoder with 3ch DAC

I/O Pin Control Register (R/W) [Sub Address 0x0C]
[Common Register for all Function block]
to set the attribute of I/O pins.
Sub Address 0x0C
bit 7
bit 6
VDOEN
HDOEN
0
0
bit 5
VDI_INV
0
bit 4
bit 3
HDI_INV
Reserved
Default Value
0
0
bit 2
VDOPOL
0
[AK8826VN]
Default Value 0x00
bit 1
bit 0
HDOPOL
CLKINV
0
0
BIT Register Name
R/W
Definition
to set polarity of Clock for CLKIN pin
bit 0
CLKINV
Clock Invert -bit
bit 1 HDOPOL HDO Polarity bit
bit 2 VDOPOL VDO Polarity bit
R/W _{0: Capturing the data at the rising edge of clock}
1: Capturing the data at the falling edge of clock
to set polarity of HDO
R/W 0: Same polarity as Input data.
1: Inverted polarity as Input data
to set polarity of VDO
R/W 0: Same polarity as Input data.
1: Inverted polarity as Input data
bit 3 Reserved Reserved
R/W Reserved, write “0 “.
to set polarity of HDI
bit 4
HDI_INV
HD polarity select
R/W 0 : Active Lo
1 : Active High
to set polarity of VDI
bit 5
VDI_INV
VD polarity select
R/W 0 : Active Lo
1 : Active High
to control HDO
bit 6
HDOEN
HDO Output Enable bit R/W 0: Disable to output the timing signal from HDO
1: Enable to output the timing signal from HDO
bit 7
VDOEN
VDO ç Output Enable
bit
R/W
to control VDO
0: Disable to output the timing signal from VDO
1: Enable to output the timing signal from VDO
MS0972-E-01
133
2008/12