AK4358_06 Datasheet, PDF (31/36 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit 8ch DAC with DSD Input

ASAHI KASEI
[AK4358]
SYSTEM DESIGN
Figure 25 shows the system connection diagram. An evaluation board (AKD4358) is available which demonstrates
application circuits, the optimum layout, power supply arrangements and measurement results.
Reset
Clock
Gen
DSP
uP
DSD
Data
Cont-
roller
Mode
Control
+
10u
0.1u
Digital 5V
13 SDTI4
14 SDTI1
15 SDTI2
16 SDTI3
17 LRCK
18 I2C
19 _CCLK/SCL
20 CDTI/SDA
21 CSN/CAD1
22 DCLK
23 DSDL4
24 DSDR4
AK4358
Top View
LPF
ROUT1+ 48
ROUT1- 47
LPF
LOUT2+ 46
LPF
LOUT2- 45
ROUT2+ 44
LPF
ROUT2- 43
LOUT3+ 42
LPF
LOUT3- 41
ROUT3+ 40
LPF
ROUT3- 39
LOUT4+ 38
LOUT4- 37
LPF
System Ground
+
0.1u 10u
LPF
Analog Ground
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
MUTE
L1ch
OUT
R1ch
OUT
L2ch
OUT
R2ch
OUT
L3ch
OUT
R3ch
OUT
L4ch
OUT
Analog 5V
MUTE
R4ch
OUT
Figure 25. Typical Connection Diagram
Notes:
- LRCK = fs, BICK = 64fs.
- When AOUT drives some capacitive load, some resistor should be added in series between AOUT and capacitive
load.
- All input pins except pull-down pins should not be left floating.
MS0203-E-01
- 31 -
2006/02