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AK4160 Datasheet, PDF (31/40 Pages) Asahi Kasei Microsystems – 16-channel Capacitive Touch Sensor IC
[AK4160]
Bits
Name
Description
D7
DRDY
Permission of Data Ready Interrupt
This interrupt is generated at the end of a measurement. The measurement value
should be read from CSDn register (Addr 0x05-0x24).
The interrupt interval is “Sampling Rate x Number of Sample”. The “Number of
Sample” is set by NF2S bits in Addr 0x70.
D6
TOUCH Permission of Touch Interrupt
The intended terminal can be configured by IRQ mask register (Addr
0x66-0x67, 0x6A-0x6B, 0x6E-0x6F).
D5
REL
Permission of Release Interrupt
The intended terminal can be configured by IRQ mask register (Addr
0x66-0x67, 0x6A-0x6B, 0x6E-0x6F).
D4
ACF
Permission of Automatic Configuration Fail Interrupt
When the measurement value on automatic configuration is out of the stipulated
range, this interrupt is generated.
D3
RANGE Permission of Upper Limit Over Interrupt
When the measurement value is over the upper limit in a measurement operation,
this interrupt is generated.
D2
GPIN
Permission of GPIO Input Interrupt
When the interrupt function is configured by GPIO control registers (Addr
0x35/0x37/…/0x43 IRQC bit),this interrupt is generated by the factor
occurrence.
D1
Reserved Reserved: This bit should be written “0”.
D0
TSL
Level Output Operational Mode Selection of Touch Status
0: Edge Operation
The IRQ pin responds to the edge for the interrupt factor selected by DRDY bit,
TOUCH bit, REL bit, ACF bit, RANGE bit, and GPIN bit. The clearance setting,
polarity setting, driver setting, and etc. are configured by Addr 0x65/0x69/0x6D.
1: Level Operation
Touch function or release function is selected by TOUCH bit and REL bit. The
intended terminal can be configured by IRQ mask register (Addr 0x66-0x67,
0x6A-0x6B, 0x6E-0x6F). The other interrupt factor cannot be selected. The
polarity setting, driver setting, and etc. are configured by Addr 0x65/0x69/0x6D.
The status cannot be cleared unlike the edge operation. The IRQ Status (IRQ2-0
bit of Addr 0x03) returns the input level of the IRQ pin.
MS1313-E-01
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2011/11