AKD4702 Datasheet, PDF (3/32 Pages) Asahi Kasei Microsystems – Evaluation board Rev.A for AK4702

ASAHI KASEI
[AKD4702]
n Evaluation mode
1) S/PDIF mode (Optical Link or BNC: default)
When the CM0 (DIP-switch S1_1 on board) is “L”, the AK4112B (DIR) generates MCLK, BICK, LRCK and
SDATA from the received bitstream through PORT2 (TORX176: optical link) or J2 (BNC). This mode is used
for the evaluation using CD test disk. The PORT1 (EXT) should be open.
1)-1. DIP-switch set-up
No.
CM0
DIF1
DIF0
Audio Data Format of AK4112B
Notes
1
“L”
“L”
“L”
16bit LSB justified
1
2
“L”
“L”
“H”
18bit LSB justified
2
3
“L”
“H”
“L”
MSB justified
3
4
“L”
“H”
“H”
I²S
4
Table 1. DIP-switch set-up
Please match the data format of AK4702 via I²C-bus control as following notes.
Note 1. 16bit LSB justified
Set up the DIP-switch as follows.
S1
AK4112B
ON 1 2 3 4 5
OFF
Set up the control registers DIF1/0 of AK4702 by enclosed software as follows.
Note 2. 18bit LSB justified
Set up the DIP-switch as follows.
S1
AK4112B
ON 1 2 3 4 5
OFF
Set up the control registers DIF1/0 of AK4702 by enclosed software as follows.
<KM067304>
-3-
2002/12