|
AK4702EQ Datasheet, PDF (25/39 Pages) Asahi Kasei Microsystems – 2ch DAC with AV SCART switch | |||
|
◁ |
ASAHI KASEI
[AK4702EQ]
 Register Map
Addr
Register Name
D7
D6
D5
D4
D3
00H Control
01H Switch
02H Main Volume
03H Zerocross
DEM1
VMUTE
0
0
DEM0
MMON
0
0
DIF1
VCR1
L5
CAL
DIF0
VCR0
L4
DVOL1
0
MONO
L3
DVOL0
04H Video Switch
VRF1
VRF0 VVCR2 VVCR1 VVCR0
05H Video output enable
CIO
TVFB
VCRC
VCRV
TVB
06H Video Volume/Clamp
0
VCLP1 VCLP0
0
CLAMP1
07H S/F Blanking control
SBIO1
SBIO0
SBV1
SBV0
SBT1
08H S/F Blanking monitor
0
0
0
0
0
When the PDN pin goes âLâ, the registers are initialized to their default values.
While the PDN=âHâ, all registers can be accessed.
Do not write any data to the register over 08H.
D2
0
VOL
L2
ZERO
VTV2
TVG
CLAMP0
SBT0
FVCR
D1
MUTE
TV1
L1
ZTM1
VTV1
TVR
VVOL1
FB1
SVCR1
D0
STBY
TV0
L0
ZTM0
VTV0
TVV
VVOL0
FB0
SVCR0
 Register Definitions
Addr
00H
Register Name
Control
R/W
default
D7
DEM1
0
D6
DEM0
1
D5
DIF1
1
D4
D3
DIF0
0
R/W
1
0
D2
D1
D0
0
MUTE STBY
0
1
1
STBY: Standby control
0 : Normal Operation
1 : Standby Mode(default). All registers are not initialized.
DAC
: powered down and timings are reset.
Gain of Volume#1
: fixed to 0dB,
Source of TVOUT
: fixed to VCRIN,
Source of VCROUT : fixed to TVIN,
Source of MONOOUT : fixed to VCRIN,
Source of TVVOUT : fixed to VCRVIN(or Hi-Z),
Source of TVRC
: fixed to VCRRC(or Hi-Z),
Source of TVG
: fixed to VCRG(or Hi-Z),
Source of TVB
: fixed to VCRB(or Hi-Z),
Source of VCRVOUT : fixed to TVVIN(or Hi-Z),
Source of VCRC
: fixed to Hi-Z or VSS(controlled by CIO bit).
MUTE: Audio output control
0 : Normal Operation
1 : ALL Audio outputs to GND (default)
DIF1-0: Audio data interface format control
00 : 16bit LSB Justified
01 : 18bit LSB Justified
10 : 18bit MSB Justified
11 : 18bit I2S Compatible (Default)
DEM1-0: De-emphasis Response Control
00 : 44.1kHz
01 : off (Default)
10 : 48kHz
11 : 32kHz
MS0424-E-00
- 25 -
2005/09
|
▷ |