AK4112B Datasheet, PDF (25/30 Pages) Asahi Kasei Microsystems – HIGH FEATURE 96kHz 24BIT DIR

ASAHI KASEI
[AK4112B]
Channel Status
Addr
Register Name
05H Channel A Status Byte 0
06H Channel A Status Byte 1
07H Channel A Status Byte 2
08H Channel A Status Byte 3
09H Channel B Status Byte 0
0AH Channel B Status Byte 1
0BH Channel B Status Byte 2
0CH Channel B Status Byte 3
R/W
default
D7
CA7
CA15
CA23
CA31
CB7
CB15
CB23
CB31
D6
CA6
CA14
CA22
CA30
CB6
CB14
CB22
CB30
D5
CA5
CA13
CA21
CA29
CB5
CB13
CB21
CB29
D4
D3
CA4
CA12
CA20
CA28
CA3
CA11
CA19
CA27
CB4 CB3
CB12 CB11
CB20 CB19
CB28 CB27
RD
Not initialized
D2
CA2
CA10
CA18
CA26
CB2
CB10
CB18
CB26
D1
CA1
CA9
CA17
CA25
CB1
CB9
CB17
CB25
D0
CA0
CA8
CA16
CA24
CB0
CB8
CB16
CB24
CA31-0: Channel A Status Byte 4-1
CB31-0: Channel B Status Byte 4-1
Bit definition changes depending upon PRO bit setting. When CV=1, these bits are updating and
may be invalid.
Burst Preamble Pc/Pd in non-PCM encoded Audio bitstreams
Addr
Register Name
0DH Burst Preamble Pc Byte 0
0EH Burst Preamble Pc Byte 1
0FH Burst Preamble Pd Byte 0
10H Burst Preamble Pd Byte 1
R/W
default
D7 D6 D5 D4 D3 D2 D1 D0
PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
PC15 PC14 PC13 PC12 PC11 PC10 PC9 PC8
PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
PD15 PD14 PD13 PD12 PD11 PD10 PD9 PD8
RD
Not initialized
PC15-0: Burst Preamble Pc Byte 1, 0
PD15-0: Burst Preamble Pd Byte 1, 0
Count Control
Addr
Register Name
11H Count Control
R/W
default
D7 D6 D5 D4 D3 D2 D1 D0
0
0
0
0
0 EFH1 EFH0 XFS96
RD RD RD RD RD R/W R/W R/W
0
0
0
0
0
0
1
0
XFS96: FS96 output select at X’tal Mode (clock Operation Mode1, Mode3 and Unlock state of Mode2)
1: FS96pin=“H”
0: FS96pin=“L”
EFH1-0: Error Flag Hold Count Select
00: 512 LRCK
01: 1024 LRCK
10: 2048 LRCK
11: 4096 LRCK
MS0078-E-02
- 25 -
2004/04