AK4112B Datasheet, PDF (24/30 Pages) Asahi Kasei Microsystems – HIGH FEATURE 96kHz 24BIT DIR

ASAHI KASEI
[AK4112B]
Receiver Status 1
Addr
Register Name
03H Receiver status 1
R/W
default
D7
D6
D5
D4
D3
D2
D1
D0
ERF
0 AUDION AUTO PEM FS1 FS0 RFS96
RD
RD
RD
RD
RD
RD
RD
RD
0
0
0
0
0
0
0
0
RFS96: 96kHz Sampling Detect at Recovery Mode.
0: fs=54kHz or less.
1: fs=88.2kHz or more
FS1-0: Sampling Frequency Output
PEM: Pre-emphasis Output
0: OFF
1: ON
This bit is made by encoding channel status bits.
AUTO: Non-PCM Auto Detect
0: No detect
1: Detect
This function is the same as AUTO pin.
AUDION: Audio bit Output
0: Audio
1: Non Audio
ERF: Unlock or Parity Error or Status change
0: No Error or No change
1: Error or Change
This function is the same as ERF pin. This bit goes “1” when Unlock Error, Parity Error, Biphase
Error, Frame Length Error or Status Change occurs. If MPAR=0 & MSTC=0, only an unlock error
is reported.
Receiver Status 2
Addr
Register Name
04H Receiver status 2
R/W
default
D7
D6
D5
D4
D3
D2
D1
D0
CV
STC CRC UNLOCK V FRERR BIP
PAR
RD
RD
RD
RD
RD
RD
RD
RD
0
0
0
0
0
0
0
0
PAR: Parity Status (0:No Error, 1:Error)
It is high if Parity Error is detected in the sub-frame. PAR is unaffected by the state of MPAR.
BIP: Biphase Status (0:No Error, 1:Error)
FRERR: Frame Error Status (0:No Error, 1:Error)
V:
Validity bit (0:No Error, 1:Error)
UNLOCK: PLL Lock status (0:Lock, 1:Unlock)
CRC: Cyclic Redundancy Check (0:No Error, 1:Error on either channel)
STC: Status change flag of Receiver status 1 (0:No change, 1:change)
This flag goes “H” when the latest value of D5-0 in Receiver Status 1(03H) is different from the
previous value. This comparison is made at every fs cycle. This bit returns to “L” by reading
Receiver Status 1(03H). The flag is disabled during the first block after Reset.
CV:
Channel Status Validity (0:Valid, 1:Not Valid, data is updating)
This signal goes “H” at the start of frame 0 and maintains “H” until the end of frame 31.
MS0078-E-02
- 24 -
2004/04