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AK5388 Datasheet, PDF (24/27 Pages) Asahi Kasei Microsystems – 120dB 24-bit 192kHz 4-Channel ADC
ASAHI KASEI
[AK5388]
1. Grounding and Power Supply Decoupling
The AK5388 requires careful attention to power supply and grounding arrangements. Alternatively if AVDD and DVDD
are supplied separately, the power up sequence is not critical. AVSS, BVSS and DVSS of the AK5388 must be
connected to the analog ground plane. System analog ground and digital ground should be connected together near to
where the supplies are brought onto the printed circuit board. Decoupling capacitors should be as near to the AK5388 as
possible, with the small value ceramic capacitor being the nearest.
2. Voltage Reference Inputs
The reference voltage for A/D converter is supplied from VREFL/R pins at AVSS reference. AVSS pin is connected to
analog ground and an electrolytic capacitor over 10μF parallel with a 0.1μF ceramic capacitor between the VREFL/R pins
and the AVSS pin eliminate the effects of high frequency noise. It is important that a ceramic capacitor should be as near
to the pins as possible. All digital signals, especially clocks, should be kept away from the VREFL/R pins in order to
avoid unwanted coupling into the AK5388. No load current may be taken from the VREFL/R pins.
VCOM is a signal ground for this device. An electrolytic capacitor (0.22µF typical) attached to the VCOM pin eliminates
the effects of high frequency noise. No load current may be drawn from the VCOM pin. All signals, especially clocks,
should be kept away from the VCOM pin in order to avoid unwanted coupling into the AK5388.
3. Analog Inputs
The Analog input signal is differentially supplied into the modulator via the LIN+ (RIN+) and the LIN− (RIN−) pins. The
input voltage is the difference between the LIN+ (RIN+) and LIN− (RIN−) pins. The full scale signal on each pin is
nominally ±2.9Vpp(typ). The AK5388 can accept input voltages from AVSS to AVDD. The ADC output data format is
two’s complement. The internal HPF removes DC offset.
The AK5388 samples the analog inputs at 128fs (6.144MHz@fs=48kHz, Normal Speed Mode). The digital filter rejects
noise above the stop band except for multiples of 128fs. The AK5388 includes an anti-aliasing filter (RC filter) to
attenuate a noise around 128fs.
The AK5388 requires a +5V analog supply voltage. Any voltage which exceeds the upper limit of AVDD+0.3V and
lower limit of AVSS−0.3V and any current beyond 10mA for the analog input pins (LIN+/−, RIN+/−) should be avoided.
Excessive currents to the input pins may damage the device. Hence input pins must be protected from signals at or beyond
these limits. Use caution especially when using ±15V for other analog circuits in the system.
Rev. 0.3
- 24 -
2007/10