AK5388_09 Datasheet, PDF (22/31 Pages) Asahi Kasei Microsystems – 120dB 24-bit 192kHz 4-Channel ADC

[AK5388]
■ Cascade TDM Mode
The AK5388 supports cascading of up to two devices in a daisy chain configuration in TDM256 mode. In this mode,
SDTO1 pin of device #1 is connected to TDMIN pin of device #2. The SDTO1 pin of device #2 can output 8-chnnels of
TDM data multiplexed with 4-chnnel of TDM data from device #1 and 4-channel of TDM data from device #2. Figure 17
shows a connection example of a daisy chain.
When using two AK5388’s in slave mode by cascade connection, the internal timing between device #1 and #2 may differ
for 1MCLK clock cycle. BICK falling edge must me more than ±10ns from a MICK rising edge to prevent this phase
difference between two devices. (Table 6)
BICK must be divided by two on a MCLK falling edge (Figure 19) when MCLK=2 x BICK (Normal speed 512fs mode or
Double speed 256fs mode), and BICK must be in-phase signal to MCLK (Figure 20) when MCLK = BICK (Normal
speed 256fs mode or Quad speed 128fs mode) to achieve this internal timing synchronization.
AK5388 #1
MCLK
LRCK
BICK
TDMIN
SDTO1
SDTO2
GND
256fs or 512fs
48kHz
256fs
AK5388 #2
MCLK
LRCK
BICK
TDMIN
SDTO1
SDTO2
8ch TDM
Figure 17. Cascade TDM Connection Diagram
LRCK
256 BICK
BICK(256fs)
#1 SDTO1(o) ^{23 22 0 23 22 0 23 22 0 23 22 0}
23 22
L1
R1
L2
R2
32 BICK 32 BICK 32 BICK 32 BICK
#1 SDTO2(o)
23 22 0 23 22 0 23 22 0 23 22 0
L1
32 BICK
R1
32 BICK
L2
32 BICK
R2
32 BICK
#2 TDMIN(i)
23 22 0 23 22 0 23 22 0 23 22 0
L1
32 BICK
R1
32 BICK
L2
32 BICK
R2
32 BICK
#2 SDTO1(o)
23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22 0 23 22
L1
32 BICK
R1
32 BICK
L2
32 BICK
R2
32 BICK
L1-#1
32 BICK
R1-#1
32 BICK
L2-#1
32 BICK
R2-#1
32 BICK
Figure 18. Cascade TDM Timing
MS1096-E-01
- 22 -
2009/08