AK5388_09 Datasheet, PDF (13/31 Pages) Asahi Kasei Microsystems – 120dB 24-bit 192kHz 4-Channel ADC

■ Timing Diagram
1/fCLK
MCLK
tCLKH
tCLKL
Figure 1. MCLK Timing (TDM0 pin = “L” or “H”)
1/fs
LRCK
BICK
tLRH
tLRL
Figure 2. LRCK Timing (TDM0 pin = “L” or “H”)
tBCK
t BCK H
tBCKL
Duty = tBCKH/tBCK, tBCKL/tBCK
Figure 3.BICK Timing (TDM0 pin = “L” or “H”)
VIH
VIL
VIH
VIL
VI H
VI L
[AK5388]
MS1096-E-01
- 13 -
2009/08