AK4359_06 Datasheet, PDF (22/33 Pages) Asahi Kasei Microsystems – 106dB 192kHz 24-Bit 8ch DAC

ASAHI KASEI
[AK4359]
„ Register Control Interface
The AK4359 controls its functions via registers. 2 types of control mode write internal registers. In the I²C-bus mode, the
chip address is determined by the state of the CAD0 pin. In 3-wire mode, the chip address is fixed to “11”. RSTB pin =
“L” initializes the registers to their default values. Writing “0” to the RSTN bit resets the internal timing circuit, but the
register s are not initialized.
* The AK4359 does not support the read command.
* When the AK4359 is in the power down mode (RSTB bit = “L”) or the MCLK is not provided, Writing to control
register is inhibited.
* When the state of P/S pin is changed, the AK4359 should be reset by RSTB bit = “L”.
* In serial control mode, the setting of parallel pins is invalid.
Function
Double sampling mode at 128/192fs
De-emphasis
SMUTE
Zero Detection
24bit LSB justified format
TDM mode
Parallel Control Mode
X
O
O
X
X
X
Serial Control Mode
O
O
O
O
O
O
Table 14. Function Table (O: Supported, X: Not supported)
(1) 3-wire Serial Control Mode (I2C pin = “L”)
3-wire µP interface pins, CSN, CCLK and CDTI, write internal registers. The data on this interface consists of Chip
Address (2bits, C1/0; fixed to “11”), Read/Write (1bit; fixed to “1”, Write only), Register Address (MSB first, 5bits) and
Control Data (MSB first, 8bits). The AK4359 latches the data on the rising edge of CCLK, so data should clocked in on
the falling edge. The writing of data becomes valid by the rising edge of CSN. The clock speed of CCLK is 5MHz (max).
CSN
CCLK
CDTI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
C1 C0 R/W A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0
C1-C0:
R/W:
A4-A0:
D7-D0:
Chip Address (Fixed to “11”)
READ/WRITE (Fixed to “1”, Write only)
Register Address
Control Data
Figure 14. Control I/F Timing
MS0289-E-02
- 22 -
2006/03