AK4359_06 Datasheet, PDF (21/33 Pages) Asahi Kasei Microsystems – 106dB 192kHz 24-Bit 8ch DAC

ASAHI KASEI
[AK4359]
„ Reset Function (RSTN bit)
When RSTN bit = “0”, internal circuit of DAC is powered down but the registers are not initialized. The analog outputs go
to VCOM voltage and DZF pins go to “H” at DZFB bit = “0”. Figure 13 shows the example of reset by RSTN bit. When
RSTN bit = “0”, pop noise is decreased at no clock state.
RSTN bit
Internal
RSTN bit
Internal
State
D/A In
(Digital)
D/A Out
(Analog)
Clock In
MCLK,LRCK,BICK
DZF
Normal Operation
(1)
GD
3~4/fs (6)
2~3/fs (6)
Digital Block Power-down
Normal Operation
“0” data
(3) (2)
(3)
(4)
Don’t care
2/fs(5)
GD (1)
Notes:
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs go to VCOM voltage.
(3) Small pop noise occurs at the edges(“↑ ↓”) of the internal timing of RSTN bit. This noise is output even if “0”
data is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the reset mode (RSTN bit = “0”).
(5) DZF pins go to “H” when the RSTN bit becomes “0”, and go to “L” at 2/fs after RSTN bit becomes “1”.
(6) There is a delay, 3~4/fs from RSTN bit “0” to the internal RSTN bit “0”, and 2~3/fs from RSTN bit “1” to the
internal RSTN bit “1”.
Figure 13. Reset Sequence Example (DZFB bit = “0”)
MS0289-E-02
- 21 -
2006/03