AK4116 Datasheet, PDF (21/36 Pages) Asahi Kasei Microsystems – LOW POWER 48KHZ DIGITAL AUDIO RECEIVER

ASAHI KASEI
[AK4116]
„ Audio Serial Interface Format
The DIF2-0 bits can select six serial data formats as shown in Table 7. In all formats, the serial data is MSB-first, 2’s
compliment format. The SDTO is clocked out on the falling edge of BICK and the DAUX is latched on the rising edge of
BICK. BICK outputs 64fs clock. When the SDTO format is equal or less than 20 bits (Mode 0-2), LSBs in the sub-frame
are truncated. In Modes 3-7, the last four LSBs are auxiliary data (see Figure 19).
When a Parity Error, Biphase Error or Frame Length Error occurs in a sub-frame, the AK4116 continues to output the
last normal sub-frame data from SDTO repeatedly until the error is removed. When an Unlock Error occurs, the AK4116
outputs “0” from SDTO. When using the DAUX pin, the data is transformed and output from SDTO. The DAUX pin is
used in Clock Operation Modes 1, 3 and in the unlock state of Mode 2. The input data format to DAUX should be
left-justified except in Mode 5. In Mode 5, both the input data format of DAUX and the output data format of SDTO are
I²S.
sub-frame of IEC60958
0
34
78
preamble
Aux.
LSB
MSB
11 12
23
AK4116 Audio Data (MSB First)
27 28 29 30 31
V UC P
MSB
LSB
0
Figure 19. Bit configuration
Mode
0
1
2
3
4
5
6
7
DIF2
0
0
0
0
1
1
1
1
DIF1
0
0
1
1
0
0
1
1
DIF0
0
1
0
1
0
1
0
1
DAUX
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, Left justified
24bit, I²S
SDTO
16bit, Right justified
18bit, Right justified
20bit, Right justified
24bit, Right justified
24bit, Left justified
24bit, I²S
Reserved
Table 7. Audio data format
LRCK
H/L
H/L
H/L
H/L
H/L
L/H
Default
MS0156-E-02
- 21 -
2004/04