AK4529 Datasheet, PDF (20/38 Pages) Asahi Kasei Microsystems – High Performance Multi-channel Audio CODEC

ASAHI KASEI
[AK4529]
n Overflow Detection
The AK4529 has overflow detect function for analog input. Overflow detect function is enable if OVFE bit is set to “1” at
serial control mode. OVF pin goes to “H” if analog input of Lch or Rch overflows (more than -0.3dBFS). OVF output for
overflowed analog input has the same group delay as ADC (GD = 27.6/fs = 626µs@fs=44.1kHz). OVF is “L” for 522/fs
(=11.8ms @fs=44.1kHz) after PDN = “↑”, and then overflow detection is enabled.
n Zero Detection
The AK4529 has two pins for zero detect flag outputs. Channel grouping can be selected by DZFM3-0 bits if P/S = “L”
and DZFE = “L” (table 9). DZF1 pin corresponds to the group 1 channels and DZF2 pin corresponds to the group 2
channels. However DZF2 pin becomes OVF pin if OVFE bit is set to “1”. Zero detection mode is set to mode 0 if DZFE=
“H” regardless of P/S pin. DZF1 is AND of all eight channels and DZF2 is disabled (“L”) at mode 0. Table 10 shows the
relation of P/S, DZFE, OVFE and DZF.
When the input data of all channels in the group 1(group 2) are continuously zeros for 8192 LRCK cycles, DZF1(DZF2)
pin goes to “H”. DZF1(DZF2) pin immediately goes to “L” if input data of any channels in the group 1(group 2) is not
zero after going DZF1(DZF2) “H”.
Mode
3
DZFM
21
0
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0110
7 0111
8 1000
9 1001
10 1 0 1 0
11 1 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
L1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF2
DZF1
DZF1
R1
DZF1
DZF1
DZF1
DZF1
DZF1
DZF2
DZF2
DZF1
DZF1
AOUT
L2
R2
L3
R3
DZF1 DZF1 DZF1 DZF1
DZF1 DZF1 DZF1 DZF2
DZF1 DZF1 DZF2 DZF2
DZF1 DZF2 DZF2 DZF2
DZF2 DZF2 DZF2 DZF2
DZF2 DZF2 DZF2 DZF2
DZF2 DZF2 DZF2 DZF2
disable (DZF1=DZF2 = “L”)
DZF1 DZF1 DZF1 DZF1
DZF1 DZF1 DZF1 DZF1
disable (DZF1=DZF2 = “L”)
L4
DZF1
DZF2
DZF2
DZF2
DZF2
DZF2
DZF2
DZF1
DZF2
R4
DZF1
DZF2
DZF2
DZF2
DZF2
DZF2
DZF2
DZF2
DZF2
Default
Table 9. Zero detect control
P/S pin
“H” (parallel mode)
“L” (serial mode)
DZFE pin
“L”
“H”
“L”
“H”
OVFE bit
disable
disable
“0”
“1”
“0”
“1”
DZF mode
Mode 7
Mode 0
Selectable
Selectable
Mode 0
Mode 0
DZF1 pin
“L”
AND of 6ch
Selectable
Selectable
AND of 6ch
AND of 6ch
DZF2/OVF pin
“L”
“L”
Selectable
OVF output
“L”
OVF output
Table 10. DZF1-2 pins outputs
MS0082-E-00
- 20 -
2001/3