AK4426 Datasheet, PDF (20/28 Pages) Asahi Kasei Microsystems – 192kHz 24-Bit Stereo ΔΣ DAC with 2Vrms Output

[AK4426]
SDA
SCL
S
start condition
P
stop condition
Figure 17. START and STOP Conditions
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
SCL FROM
MASTER
S
START
CONDITION
not acknowledge
1
2
acknowledge
8
9
Figure 18. Acknowledge on the I²C-bus
clock pulse for
acknowledgement
SDA
SCL
data line
stable;
data valid
change
of data
allowed
Figure 19. Bit Transfer on the I²C-bus
MS1176-E-02
- 20 -
2011/03