AKD7782-A Datasheet, PDF (16/73 Pages) Asahi Kasei Microsystems – AK7782 Evaluation Board Rev.0

(4) “FPGA” Dialogue
[AKD7782-A]
Figure 12. “FPGA1” Dialogue
FPGA1/FPGA2 dialogues are used to modify the data path and the setting of AK4118A.
(It is prohibited to modify test and reserved items.)
FPGA Setting Table：（Bold type items are the default setting.）
ADDRESS：00
Bit
D[15:14]
Function
SDIN1
D[13:12]
SDIN2
D[11:10]
SDIN3
D[9:8]
SDIN4
Description
Input data source to SDIN1 pin of AK7782
00 : AK4118A-IN
01 : SMUX1-DAT1
10 : SMUX2-DAT1
11 : LOW
Input data source to SDIN2 pin of AK7782
00 : AK4118A-IN
01 : SMUX1-DAT1
10 : SMUX2-DAT1
11 : LOW
Input data source to SDIN3 pin of AK7782
00 : AK4118A-IN
01 : SMUX1-DAT1
10 : SMUX2-DAT1
11 : LOW
Input data source to SDIN4 pin of AK7782
00 : AK4118A-IN
01 : SMUX1-DAT1
10 : SMUX2-DAT1
11 : LOW
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2011/03