AK4522_12 Datasheet, PDF (15/19 Pages) Asahi Kasei Microsystems – 20Bit Stereo ΔΣ ADC & DAC

ASAHI KASEI
[AK4522]
1. Grounding and Power Supply Decoupling
The AK4522 requires careful attention to power supply and grounding arrangements. VA and VD are usually supplied
from analog supply in system. Alternatively if VA and VD are supplied separately, the power up sequence is not critical.
AGND and DGND of the AK4522 should be connected to analog ground plane. System analog ground and digital ground
should be connected together near to where the supplies are brought onto the printed circuit board. Decoupling capacitors
should be as near to the AK4522 as possible, with the small value ceramic capacitor being the nearest.
2. Voltage Reference
The differential voltage between VREFH and AGND sets the analog input/output range. VREFH pin is normally
connected to VA with a 0.1uF ceramic capacitor. VCOM is a signal ground of this chip. An electrolytic capacitor 10uF
parallel with a 0.1uF ceramic capacitor attached to VCOM pin eliminates the effects of high frequency noise. No load
current may be drawn from VCOM pin. All signals, especially clocks, should be kept away from the VREFH and VCOM
pins in order to avoid unwanted coupling into the AK4522.
3. Analog Inputs
The ADC inputs are differential and internally biased to the common voltage (VA/2) with 30kΩ (typ) resistance. Figure 7
is a circuit example which analog signal is input by single end. The signal can be input from either positive or negative
input and the input signal range scales with the supply voltage and nominally 0.6 x VREFH Vpp. In case of single ended
input, the distortion around full scale degrades compared with differential input. Figure 10 is a circuit example which
analog signal is input to both positive and negative input and the input signal range scales with the supply voltage and
nominally 0.3 x VREFH Vpp. The AK4522 can accept input voltages from AGND to VA. The ADC output data format is
2’s complement. The output code is 7FFFFH(@20bit) for input above a positive full scale and 80000H(@20bit) for input
below a negative fill scale. The ideal code is 00000H(@20bit) with no input signal. The DC offset is removed by the
internal HPF.
The AK4522 samples the analog inputs at 64fs. The digital filter rejects noise above the stop band except for multiples of
64fs. A simple RC filter (fc=150kHz) may be used to attenuate any noise around 64fs and most audio signals do not have
significant energy at 64fs.
1.5Vpp
10k
AK4522
1.5nF 330
AINR+ 2
AINR- 3
AINL+ 4
330
1.5Vpp
-
+
NJM2100
AINL- 5
Same circuit
4.7k
Vop
10k
10k 22u
-
Signal
+
Vop
3.2Vpp
Vop=VA=5V
4.7k
0.1u _BIAS
4.7k
+
10u
Figure 10. Differential Input Buffer Example
M0020-E-02
- 15 -
2012/01