AK8815 Datasheet, PDF (14/37 Pages) Asahi Kasei Microsystems – NTSC/PAL Digital Video Encoder

ASAHI KASEI
[AK8815/16]
FUNCTIONAL OUTLINE
( 1 ) Reset
( 1-1 ) Reset of Serial Interface part ( asynchronous reset )
Reset is made by setting RSTN pin to low.
( 1-2 ) Reset of other than Serial Interface blocks
Reset is made by keeping RSTN pin low for a longer than 100 clock time, in normal operation.
( 1-3 ) at Power-On-Reset ( including power-down release case )
Follow the power-on-reset sequence.
At the completion of each initialization, all internal registers are set to default values ( refer to Register Map ).
Right after the reset, Video output of the AK8815/16 is put into Hi-Z condition.
( 2 ) Power-Down
It is possible to put the device into power-down mode by setting the AK8815/16 power-down pin to GND.
Transition to power-down mode should be followed by the power-down sequence. As for the recover from the
power-down mode, it should be followed by the power-down release sequence.
( 3 ) Master Clock
As a master clock of the AK8815/16, either a crystal resonator or a crystal oscillator can be used. Either of the
operation mode ( a crystal resonator or a crystal oscillator ) is selected by CLKMD pin.
Crystal resonator mode : CLKMD DVSS
Crystal oscillator mode : CLKMD XVDD
When a crystal resonator is used, connect a resonator between XTI pin and XTO pin.
An oscillating frequency to be used differs in NTSC encoding operation and in PAL encoding operation.
A clock frequency to be used is as follows :
in NTSC encoding operation : 24.5454 MHz
in PAL encoding operation : 29.50 MHz
When a crystal oscillator is used, connect it to XTI pin.
When CLKINV = L, same rising clock as CLKOUT rise is used as an internal encoder clock, but
when CLKINV = H,
internal encoder is operated by using an inverted clock.
Even when CLKINV is altered, clock phase of CLKOUT is not changed.
( 4 ) Video Signal Interface
Video input signal ( data ) is processed in slave operation mode which is synchronized with HSYNC / VSYNC.
When CLKINV = DVSS, external input is latched at the rising edge of clock
( 5 ) Pixel Data
Input data to the AK8815/16 is YCbCr ( 4:2:2 ).
Data with Y : 15/16 ~ 235 and CbCr : 15/16 ~ 240 should be input.
( 6 ) Video Signal Conversion
Video Re-Composition module converts the multiplexed data ( ITU-R BT.601 Level Y, Cb, Cr ) into interlaced
NTSC-M and PAL-B, D, G, H, I data. Video encoding setting is done by “ Mode Register “.
MS0331-E-00
14
2004 / 08