AK4532 Datasheet, PDF (14/17 Pages) Asahi Kasei Microsystems – Internet/Network/General Purpose Multimedia Audio CODEC

ASAHI KASEI
[AK4532]
System Design
Figure 2 shows the system connection diagram. An evaluation board is available which demonstrates the
optimum layout, power supply arrangements and measurement results.
4.7u ^{+ 0.1u}
10
14
VD
0.1u
2
VA
VRAD ²¹
+ _4.7u
+ _4.7u
0.1u
+5V
Analog
Controller
&
Synth.
7 _PD
VCOM ²⁴
8 _MCLK
9 _LRCK
10 _SCLK
AINFL ²²
11 _SDI
12 _SDO
AK4532
AINFR ²³
18 _CMODE
17 _CDATA
16 _CCLK
15 _CS
MIC/AUXR ³
AUXL ⁴
LineR ⁵
LineL ⁶
19
LOUT
+ _4.7u
0.1u
Lch
Analog
Out
DGND
13
ROUT ²⁰
AGND
1
Rch
Analog
Out
Figure 2. Typical Connection Diagram
1. Grounding and power supply decoupling
The AK4532 requires careful attention to power supply and grounding arrangements. VD should be
supplied from analog power supply. Analog ground and digital ground should be connected together
near to where the supplies are brought onto the printed circuit board. Decoupling capacitors should
be as near to the AK4532 as possible, with the small value ceramic capacitor being the nearest.
2. On-chip voltage reference
The on-chip voltage references are output on the VRAD and VCOM pins for decouping .
The VRAD is used as the reference of A/D conversion. The VCOM is a signal ground of this chip. An
electrolytic capacitor less than 10uF in parallel with a 0.1uF ceramic capacitor attached to these pins
eliminates the effects of high frequency noise. Especially, the small value ceramic capacitors should
be as near to the AK4532 as possible. No load current may be drawn from the VRAD and VCOM
pins. All signals, especially clocks, should be kept away from the VRAD and VCOM pins in order to
avoid unwanted coupling into the chip.
0178-E-01
14
1999/06