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AK4532 Datasheet, PDF (12/17 Pages) Asahi Kasei Microsystems – Internet/Network/General Purpose Multimedia Audio CODEC | |||
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ASAHI KASEI
4. Explanation of each sequence
4.1. Reset & Power down
Power Supply
PD pin
PD(register)
RST(register)
[AK4532]
Internal State
INIT1
INITA Normal
PD
INITA Normal INIT2 Normal PD+INIT2 INITA Normal
Write to register
External clock
MCLK,LRCK,SCLK
Inhibit(1)
Inhibit(2)
Inhibit(2
The clocks may be stopped.
ï½¥INIT1: Initializing all registers. The AK4532 exists in the power down state.
ï½¥INIT2: Initializing all registers except PD , RST registers.
ï½¥INITA: Initializing the analog section. Initializing period is 516/fs.
ï½¥PD:
Power down state. All analog outputs are floating.
In case of RST register = â0â, initializing all registers except PD , RST registers.
ï½¥Inhibit(1): Inhibits writing to all registers.
ï½¥Inhibit(2): Inhibits writing to all registers except for PD , RST registers.
ï½¥The AK4532 operates with the external clocks(MCLK, LRCK, SCLK) during initializing the
analog section.
Figure 1. Reset & Power Down Sequence
4.2. PD pin operation
âHâ: Normal operation
âLâ: Initializing mode 1(INIT1 in Figure 1)
ï½¥ Initializing all registers.
ï½¥ Inhibits writing to all registers.
ï½¥ The initialization of the analog section starts at rising edge of PD pin.
ï½¥ SDO pin stays âLâ during the initializing periods of 516/fs.
ï½¥ Going into power down state.
4.3. RST register operation
â1â: Normal operation
â0â: Initializing mode 2(INIT2 in Figure 1)
ï½¥ Initializing all registers except PD , RST registers.
ï½¥ Inhibits writing to all registers except PD , RST registers.
ï½¥ RST register goes â1â when PD pin goes âLâ.
ï½¥ The analog section is not initialized.
4.4. PD register operation
â1â: Normal operation
â0â: Power down
ï½¥ The contents of all registers are held.
ï½¥ PD resister goes â1â when PD pin goes âLâ.
ï½¥ All analog outputs(LOUT, ROUT) go floating.
ï½¥ The initialization of the analog section starts at the rising edge of PD resister.
ï½¥ SDO pin stays âLâ during the initializing period of 516/fs.
4.5. SDO output pin operation
0178-E-01
12
1999/06
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