AK8452 Datasheet, PDF (12/46 Pages) Asahi Kasei Microsystems – 2 channel-input 16 bit 10MSPS ADC

ASAHI KASEI
AKM Confidential
[AK8452]
■ AFE block, Switching characteristics
(AVDD=3.135~3.465V, DRVDD=3.0~3.6V, Ta=0∼70°C , unless otherwise specified)
No.
Item
pin
min. typ. max. unit
Condition
1 MCLK cycle time (T) MCLK
25
125 ns mode 1(Note 2)
31.2
250
mode 2(Note 2)
15.6
125
mode 3(Note 2)
31.2
250
mode 4(Note 2)
2 MCLK H / L width
MCLK
12.5
ns mode 1(Note 2)
12.5
mode 2(Note 2)
7.8
mode 3(Note 2)
15.6
mode 4(Note 2)
3 TSMP setup time
TSMP
5
ns Note 1
(referenced to MCLK↑)
4 TSMP hold time
TSMP
5
ns Note 1
(referenced to MCLK↑)
5 Aperture delay
CISIN
2
ns Data level
(referenced to MCLK↑)
6 Aperture delay
CISIN
2
ns Reference level
(referenced to MCLK↑)
7 TSMP cycle
TSMP
8T
mode 1(Note 2)
(MCLK period-unit )
4T
mode 2(Note 2)
8T
mode 3(Note 2)
4T
mode 4(Note 2)
8 Data output delay D0,
At load: 20pF
(referenced to MCLK↑ D1,D2,D3
Drivability
Or MCLK↓)
2
25 ns
: normal mode
2
20 ns
: x2 mode
9 Pipeline delay
D0,
6
1ch 4bit bus 時
(SMP period-unit ) D1,D2,D3
5
1ch 2bit bus 時
3
2chmode 時
10 Reset pulse width
RESETB
50
ns
Note 1) Number of MCLK rising edges during TSMP = H duration is allowed to be 1 to 3 times in
1ch,Single Edge, 2bit bus Mode operation, and only a single edge is allowed in the other
mode operation.
Note 2) mode 1 ~ mode 4 explanation
mode 1 : AFE 2ch./ single edge/ 4bit bus mode
mode 2 : AFE 1ch./ single edge/ 4bit bus mode
mode 3 : AFE 1ch./ single edge/ 2bit bus mode
mode 4 : AFE 1ch/ double edge/ 2bit bus mode
MS0955-E-00
12
2008/03