W3000 Datasheet, PDF (11/28 Pages) Agere Systems – W3000 PLL Dual-Band Frequency Synthesizer

Advance Data Sheet
December 1999
W3000 PLL Dual-Band Frequency Synthesizer
REF Register
This section describes each bit of the reference register. The REF register is used for programming the division
ratio of the reference clock and for initial setup of the operation modes.
Table 7. REF Register Bit Description (C0 = 1, C1 = 0)
Bit
1
2:12
13
14
15:16
17
18:19
20
21
22
23
24
Name
C0 = 1
R[1:11]
D1
D2
D3, D4
D5
D6, D7
RE
ERES
EN1
LD
C1 = 0
Description
Register address bit. C0 = 1 for REF (last bit in serial sequence).
Reference frequency divide ratio.
Forced counter reload programming (synchronous/asynchronous).
Charge pump disable function.
Programable charge pump current for frequency band 2.
Phase detector polarity.
Programable charge pump current for frequency band 1.
Reset for first programming after powerup (1 = reset).
Enables external resistor (on RES pin) to set charge pump current.
Enable W3000. (0 is powerdown.)
Lock detect output enable.
Secondary address bit (first bit in serial sequence).
Table 8. REF Register
Last bit in serial sequence
First bit in serial sequence
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
C0 R R R R R R R R R R R D D D D D D D RE ERES EN LD C1
= 1 1 2 3 4 5 6 7 8 9 10 11 1 2 3 4 5 6 7
=0
Table 9. R1:R11: Reference Divider Ratio (Bits 2 to 12)
R11 R10 R9 R8 R7 R6 R5 R4 R3 R2 R1 Divide Ratio R
—
—
—
—
—
—
—
—
—
—
—
—*
0
0
0
0
0
0
0
0
0
1
0
2
0
0
0
0
0
0
0
0
0
1
1
3
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1
1
1
1
1
1
1
1
1
1
1
2047
*The reference counter cannot operate with division numbers less than 2.
Lucent Technologies Inc.
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