DAC8426 Datasheet, PDF(8/12 Page) Analog Devices – Quad 8-Bit Voltage Out CMOS DAC Complete with Internal 10 V Reference

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DAC8426 Datasheet, PDF (8/12 Pages) Analog Devices – Quad 8-Bit Voltage Out CMOS DAC Complete with Internal 10 V Reference

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DAC8426

a) Large Signal

b) Settling Time Response (Negative Transition)

Test Conditions, All Photos:

VDD = +15 V

CREFOUT = 10 â®F

RL = 2 kâ

Digital Input Sequence 0, 255, 0

c) Settling Time Response (Positive Transition)

Figure 3. Dynamic Response

The outputs can withstand an indefinite short-circuit to AGND

to typically 50 mA. The output may also be shorted to any volt-

age between VDD and VSS; however, care must be taken to not

exceed the device maximum power dissipation.

The amplifierâs emitter follower output stage consists of an in-

trinsic NPN bipolar transistor with a 400 ÂµA NMOS pull-down

current-source load connected to VSS. This circuit configuration

shown in Figure 4 enables the output amplifier to develop out-

put voltages very close to AGND. Only the negative supply of the

four output buffer amplifiers are connected to VSS. Operating

the DAC8426 from dual supplies (VDD = +15 V and VSS = â5 V)

improves negative going output settling time near zero volts.

When operating single supply (VDD = +15 V and VSS = 0 V) the

output sink current decreases as the output approaches zero

voltage. Within 200 mV of AGND (single-supply operation) the

internal sinking capability appears resistive at a value of approxi-

mately 1200 â¦. The buffer amplifier output current and voltage

characteristics are plotted in Figure 5.

â8â

REV. C

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